Reductions in cell capacitance due to reductions in memory cell area impede the progress towards higher integration of memory devices, and make it more difficult to secure desired cell capacitance using typical dielectric materials such as nitride/oxide (NO) and tantalum pentoxide Ta.sub.2 O.sub.5. Therefore, research into methods for forming dielectric layers of capacitors using high dielectric materials such as Ba(Sr,Ti)O.sub.3 (BST) or Pb(Zr,Ti)O.sub.3 (PZT), has been conducted. At this time, it is also well known that metals of the platinum group (or an oxide thereof) have excellent oxidation resistance and relatively low inter-diffusibility with BST or PZT thin films and are suitable for use as capacitor electrode materials.
FIGS. 1A and 1B are sectional views for illustrating a conventional method for forming a capacitor storage electrode using platinum. Referring to FIG. 1A, an insulating layer 12 formed on a semiconductor substrate 10 is partially etched to form a storage contact hole 14, and then polysilicon is deposited and etched back to form a conductive plug 16 for filling the storage contact hole 14. A titanium nitride layer 18 (as a barrier layer) is then formed on the resultant structure where the conductive plug 16 is formed, and platinum is deposited on the titanium nitride layer 18 to form a platinum layer 20. Then, an oxide layer to be used as an etching mask is formed on the resultant structure where the platinum layer 20 is formed, and patterned to form a mask pattern 22.
Referring to FIG. 1B, using the mask pattern 22 as an etching mask, the platinum layer 20 and the titanium nitride layer 18 are sequentially etched to form a platinum layer pattern 24 and a barrier layer pattern 26 which collectively form a storage electrode 27. After removing the mask pattern 22, a dielectric layer 28 formed of BST or PZT is deposited as a blanket layer using a sputtering method or a metal organic chemical vapor deposition (MOCVD) method. Then, a plate electrode 30 is formed on the dielectric layer 28, opposite the storage electrode 27.
However, when forming a capacitor using a high dielectric material such as BST or PZT as described above, problems may occur. First, during the step of forming the dielectric layer 28, diffusion of oxygen through the side surfaces of an exposed barrier layer 26 may deteriorate the electrical characteristics of the capacitor. In particular, the oxygen atmosphere and the high temperature at which the high dielectric layer 28 (such as BST or PZT) is typically formed, accelerate the rate of oxygen diffusion into the barrier layer 28. Due to oxygen diffusion, the barrier layer pattern 26 may be partially oxidized, and a titanium oxide layer TiO.sub.2 (not shown) which has an insulating characteristic may be formed on an interface between the conductive plug 16 and the barrier layer pattern 26, or between the barrier layer pattern 26 and the platinum layer pattern 24. A discussion of these adverse consequences of oxygen diffusion is also provided in U.S. Pat. No. 5,478,772 to Fazan.
As will be understood by those skilled in the art, the titanium oxide layer may cause contact failure between the barrier layer pattern 26 and the platinum layer pattern 24. Also, the titanium oxide layer deteriorates the function of the barrier layer 26 in preventing diffusion of oxygen or metal atoms therethrough, and may cause generation of leakage currents between the storage electrode and the semiconductor substrate. Second, since the storage electrode including the platinum layer pattern 24 is required to be thickly formed, the titanium oxide layer may impede patterning and may generate a high step difference adjacent the capacitor. Alternatively, if the platinum layer pattern 24 of the storage electrode is thin, then oxygen may readily pass through the platinum layer pattern 24 to combine with the barrier layer pattern 26. Accordingly, the platinum layer pattern 24 is typically made to be about 2000 .ANG. thick or more. However, since platinum is very hard and refractory, it typically 2 0 cannot be easily etched through dry etching such as reactive ion etching. Accordingly, when the platinum layer pattern is 2000 .ANG. thick or more, patterning becomes very difficult and the platinum layer pattern 24 may create a large step difference around the capacitor. Third, it is typically difficult to secure an etching mask comprising a material that can be selectively etched at a much lower rate than platinum. This latter difficulty is further compounded when thick platinum layer patterns 24 are used.